An IRIG-B code generator based on ARM and FPGA

GAO Lin^1,2,3, HU Yong-hui^1,2, HOU Lei^1,2

(1. National Time Service Centre, Chinese Academy of Sciences, Xi′an 710600, China;

2. Key Laboratory of Precision Navigation and Timing Technology, National Time Service Center,

Chinese Academy of Sciences, Xi′an 710600, China;

3. Graduate University of Chinese Academy of Sciences, Beijing 100039, China)

Abstract: In this design, an ARM chip is used as the master control chip, while an FPGA chip is used as the main functional chip, and they can be programmed by using C programming language and Verilog hardware description language respectively. The IRIG-B code signal is generated and controlled by the software, and then the frequency demultiplication 1 PPS signal and the external standard 1 PPS signal are used to ensure the synchronization of time scale signal. Afterwards, the digital look-up table which is based on the ROM in FPGA is used to realize the digital modulation of AC code. The whole design is easy to be realized and applied.

Key words: IRIG-B code; ARM chip; FPGA; Digital modulation